How to load a design onto an Arty A7 from its board page¶

You have an Arty A7’s page open on welland.fpgas.online and a .bit bitstream for it. You want the design to run. The load goes into the FPGA’s SRAM, so a reset or a power cycle ends it. A reset or a reboot also empties /home/pi, uploads included.

No Arty A7 was in service when this was checked

On 11 October 2026 the welland list showed no Arty A7; a board is listed only while its check passes (infra issue #125). The steps below are for a board that is back on that list. They cover welland only: the ps1 list shows host names, not board types (the board page).

What you need¶

An Arty A7’s page, from the welland list: a board whose board type on the list is Arty A7.
A .bit file for the Arty A7, here design.bit.

Steps¶

Choose design.bit with the page’s file chooser, then press upload. It goes into /home/pi/Uploads/ on the host.
In the page’s terminal, load the design. The FPGA runs it from SRAM.
```
$ openFPGALoader -b arty Uploads/design.bit
```

Check¶

The load’s last line ends with done 1. With done 0 the FPGA is not configured, whatever the exit status; the STAT register printed under it says why.
In the terminal, ls /dev/ttyUSB* lists two devices, the JTAG channel and the UART channel.

If it fails¶

What you see	Likely cause	Fix
no `/dev/ttyUSB*` device at all	the Arty’s USB chip is not on the host’s USB	run `lsusb` in the terminal. If it does not list `0403:6010`, the FT2232H, the host cannot reach the board, and a visitor cannot fix that: the cause is the USB cable between the board and its host
`done 0`	the FPGA did not configure	read the STAT register printed under it, and check that the file was built for an Arty A7

More causes are on How to load a design onto an Arty A7.