How to load a design into a NeTV2 on a Raspberry Pi 3B+

You want to load a bitstream into a NeTV2’s FPGA on a Raspberry Pi 3B+, over GPIO JTAG with openFPGALoader.

The load goes to the FPGA’s SRAM and is lost at power-off; How to write a design into a NeTV2’s flash keeps it. A NeTV2 on a Raspberry Pi 5 is on its own page.

Warning

On these hosts the FPGA’s serial TX pin is the Pi’s kernel console UART. A bitstream that drives that line crashes a netbooted Pi through SysRq. Step 1 checks for it.

What you need

Steps

  1. On the Pi, run sysctl kernel.sysrq and cat /proc/cmdline. If kernel.sysrq does not read 0, run sudo sysctl -w kernel.sysrq=0. If the command line has console=serial0, do not load: the host is safe only without it.

  2. On the Pi, run sudo openFPGALoader --cable libgpiod --pins 27:22:4:17 --detect to see the FPGA answer on JTAG.

  3. On the Pi, run sudo openFPGALoader --cable libgpiod --pins 27:22:4:17 design.bit to load the bitstream. The effective JTAG clock is about 5 MHz, so a load is slow.

The pin order is TDI:TDO:TCK:TMS.

Check

Step 2 lists the FPGA of an XC7A35T board as idcode 0x0362d093 with IR length 6. The part and its IDCODE are in FPGA device variants.

In step 3, the load’s last line ends with done 1. With done 0 the FPGA is not configured, whatever the exit status; the STAT register printed under it says why.

If it fails

What you see

Likely cause

Fix

The Pi crashes or drops off when the design starts

The design drives the serial TX line while the Pi’s kernel console and SysRq are on

Make both checks of step 1 before loading again

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